| Academic Paper | Year | Conferece | Proceedings URL |
| FPGA Hardware of the LSB Steganography Method | 2012 | the IEEE International Conference on Computer, Information and Telecommunication Systems (CITS 2012) |
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| Relational Database Approach for Execution Trace Analysis | 2012 | the IEEE International Conference on Computer, Information and Telecommunication Systems (CITS 2012) |
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| A Methodology for Distributed Virtual Memory Improvement | 2011 | The Informatics Engineering and Information Science (ICIEIS 2011) |
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| Image Steganography Optimization Technique | 2011 | Springer LNICST, First International Joint Conference, SPIT 2011 and IPC 2011, Signal Processing and Information Technology |
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| An Automated SAT Encoding-Verification Approach for Efficient Model Checking | 2010 | in Proc. of the 22nd International Conference on Microelectronics (ICM 2010) |
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| Fault Tolerance and Security Issues in MPLS Networks | 2010 | IProceedings of the 10th WSEAS international conference on Applied computer science |
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| MDGs Reduction Technique Based on the HOL Theorem Prover | 2010 | The 40th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2010) |
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| SAT Based Model Checking for MDG Models | 2010 | The 8th IEEE International NEWCAS Conference |
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| LCF-style for Secure Verification Platform based on Multiway Decision Graphs | 2009 | In Proceedings of the 2nd Conference Internationale sur linformatique et ses Applications (CIIA 2009) |
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| Processing APL Properties to Generate Verification-Ready MDG Model | 2009 | IEEE International Conference on Microelectronics (ICM’09) |
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| Reliability of Recursive Concentrator Structure | 2009 | IEEE Symposium on Industrial Electronics & Applications Languages (IEEE ISIEA 2009) |
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| The Performance of Combining Multiway Decision Graphs and HOL Theorem Prover | 2009 | Languages for Formal Specification and Verification, Forum on Specification & Design Languages (IEEE FDL 2008) |
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| A New Approach for the Construction of Multiway Decision Graphs | 2008 | 5th International Colloquium on Theoretical Aspects of Computing (ICTAC 2008), Lecture Notes in Computer Science |
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| LCF-style Platform based on Multiway Decision Graphs | 2008 | 17th Workshop on Functional and (Constraint) Logic Programming (WFLP 2008) |
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| Multiway Decision Graphs Reduction Approach based on the HOL Theorem Prover | 2008 | Second International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2008), The British Computer Society |
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| Reachability Analysis using Multiway Decision Graph in the HOL Theorem Prover | 2008 | ACM Symposium on Applied Computing (ACM SAC 2008) |
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| The MDG-HOL Platform for Automatic Verification | 2008 | 10th Maghrebian Conference on Software Engineering and Artificial Intelligence (MCSEAI 2008) |
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| A High Level Reachability Analysis using Multiway Decision Graph in the HOL Theorem Prover | 2007 | International Conference on Theorem Proving in Higher Order Logics (TPHOLs 2007): B-Track Proceedings |
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| High Level Reduction Technique for Multiway Decision Graphs Based Model Checking | 2007 | First International Workshop on Verification and Evaluation of Computer and Communication Systems (VECoS 2007) |
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| Integrating SAT with Multiway Decision Graphs for Efficient Model Checking | 2007 | IEEE International Conference on Microelectronics (ICM 2007) |
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| Towards First-Order Symbolic Trajectory Evaluation | 2007 | The 37th International Symposium on Multiple-Valued Logic (ISMVL 2007) |
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| Embedding of MDG Directed Formulae in HOL Theorem Prover | 2006 | 9th Maghrebian Conference on Software Engineering and Artificial Intelligence (MCSEAI 2006) |
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